1. Field of the Invention
The present invention relates to a semiconductor memory device comprising a current corrector and a frequency corrector.
2. Description of the Related Art
In a frequency trimming processing in conventional voltage/current/oscillator circuits and the like, an external device (for example, LSI tester) is used to measure a voltage, a current and a frequency, and trimming (optimizing) data for correcting a result of the measurement to a value as close as possible to a targeted value is calculated, and the trimming data is programmed in a non-volatile memory.
For example, when a semiconductor memory device is manufactured, there are variations in parameters, such as a thickness of a gate oxide film, dimensions of respective parts, an impurity concentration in a diffusion region and the like, in each manufacturing process. Accordingly, there are variations in a standard voltage for setting optimum writing, reading and erasing potentials and other voltages. Such variations in the manufacturing process make an actual state of the semiconductor device different from a state of the semiconductor memory device originally expected in a designing process. In order to absorb the variations in the manufacturing process of the semiconductor memory device, the trimming processing is executed in the semiconductor memory device so that the before-mentioned voltages can be optimized.
In the trimming processing like this, for example, with respect to trimming of the voltage, such a method has been proposed wherein it is unnecessary to provide any special examination and device for storing a trimming value become unnecessary by monitoring a voltage generated in the LSI in an AD converter so that the trimming data is constantly generated was proposed.
However, the trimming data in the trimming method in which the conventional external device is used is specific random data with respect to each chip. Therefore, in the case where a plurality of chips is simultaneously measured by the external device, it becomes necessary to individually control each chip when measurement/calculation/program read from the non-volatile memory is executed.
Further, according to the method proposed in the foregoing patent document, as the correction is necessarily executed every time when the chip is operated after the correction based on the trimming data, an additional current is consumed correspondingly. Further, a resolving power in the correction is constant, and it is not possible to flexibly select an amount of time and resolving power demanded in the correction.